1. Field of the Invention
The present invention provides a method for forming an electric device having power switches, and more particularly, a method for forming the power switches around a logic circuit of the electric device.
2. Description of the Prior Art
Integrated circuits (ICs) have been highly developed. Personal computers, mobile phones, watches, and calculators, for example, are applications of ICs. ICs with small area, low power consumption, and simple manufacturing procedures are principle points for research and development departments of IC manufactories. Therefore, in order to save energy, a layout of an IC usually requires power switches for controlling power supply. There are a lot of designs of power switches in the prior art, such as a MOSFET (metal oxide semiconductor field effect transistor), which is taken as a power switch of a low power circuit.
Please refer to FIG. 1, which illustrates a schematic diagram of a prior art layout 10 using MOSFETs as power switches. The layout 10 includes a logic circuit 12, a p-type MOS 14, an n-type MOS 16, and a control circuit 18. The logic circuit 12 performs operations. The p-type MOS 14 and the n-type MOS 16 controlled by the control circuit 18 turn on to provide power for the logic circuit 12, or cut off to stop providing power. Therefore, when it is not necessary for the logic circuit 12 to perform any operation, the control circuit 18 controls the p-type MOS 14 and the n-type MOS 16 to stop providing power to the logic circuit 12, so as to save energy.
A chip always includes a plurality of logic circuits. Please refer to FIG. 2, which illustrates a schematic diagram of a prior art layout of a chip 20. The chip 20 includes a plurality of logic circuits. In the chip 20, a switch circuit 22 is used to provide power to a logic circuit 24. According to different requirements and according to the logic circuit 24 used, the switch circuit 22 can be one of many different designs of power switches. Then, depending on a type of the switch circuit 22 and available areas near the logic circuit 24, the switch circuit 22 is set beside the logic circuit 24. However, the prior art layout does not take account of the effect of the switch circuit 22 on the chip 20. That is, the prior art layout positions the switch circuit 22 while only considering the design of the switch circuit 22 and available areas in the chip 20, but without considering the effect of the switch circuit 22 on the chip 20.